The subject application is related to subject matter disclosed in Japanese Patent Applications No. H11-271221 filed on Sep. 24, 1999 and No. H12-281158 filed on Sep. 18, 2000 in Japan to which the subject application claims priority under Paris convention and which is incorporated herein by reference.
(i) Field of the Invention
The present invention relates to a technique for compensating turbulence in crystallinity produced in a process for crystallizing an amorphous layer formed on an insulating substrate, and more particularly to) a repair technique of , e.g., an analog switch for driving a signal line of a liquid crystal
(ii) Description of the Related Art
Since a liquid crystal display has significant advantages such as high picture equality reduction in width and weight, and low-consumption power, it ;s widely used in .a notebook-size personal computer or a mobile electronic device and the like. In particular, development and research of a liquid crystal display in which a thin film transistor (which will be referred to as a TFT hereinafter) consisting of polycrystalline silicon with the high mobility is used for a switching device for displaying pixels or a switching device for driving a signal line have been performed at full blast in recent years.
In this kind of liquid crystal display, after forming an amorphous silicon layer on a top face of a glass substrate, the heat treatment and the like is carried out to convert the amorphous silicon layer into a polycrystalline silicon layer, and a part of the polycrystalline silicon layer is utilized as a channel region of the TFT.
Since the TFT consisting of the polycrystalline silicon can reduce the device size, high integration is possible and a high-resolution liquid crystal display can be realized. Further, since the nobility is high, it can be used as a TFT for a drive circuit and there is such an advantage as that a pixel array portion and a drive circuit can be integrally formed on the same substrate.
In order to uniformly form the TOT consisting of the polycrystalline silicon across a large area, there is required a crystallization process by which a semiconductor layer such as an amorphous silicon layer formed on the glass substrate is solid-phase-grown to be crystallized. However, since the glass substrate includes a lot of foreign particles such as protrusions or glass holes, the particle shape of the polycrystalline silicon layer may become uneven, thereby generating particles having an abnormal grain diameter. As a result, there is a problem such that the T including the particles having a different threshold value is locally formed in the channel region.
In particular, an analog switch for writing a pixel signal on a video bus in a video signal line has a large channel width W because it requires a large current. Accordingly, it is apt to be affected by foreign particles and the like in the glass substrate. Because of this, the TFT including the particles having a different threshold value is locally apt to formed.
When the above-described TFT including the particles having a different threshold value if formed to the TFT constituting an analog switch, a leak current is produced when the off state should be maintained. The analog switch can not be hence completely turned off, thereby deteriorating the display characteristic .
A fluctuation ink threshold value due to foreign particles or small glass holes and the like in the glass substrate can be suppressed to some degree by improving a method for cleaning the glass surface or a method for manufacturing glass. However a spin type cleaning method has a problem such that a cleaning liquid becomes a minute liquid, i.e., misty state during rotation and again falls in a given point in time in cleaning to contaminate the surface, and both generation of mists and re-falling can not be completely avoided.
In addition, the high cost can be expected for improvement of the glass manufacturing method, which makes it difficult to reduce the cost of the liquid crystal display.
On the other hand, Japanese patent application laid-open No 2746411 discloses a technique by which the display state of a display element is estimated, and a light beam having an irradiation amount based on the estimation result is irradiated with all regions of the thin film transistor having a drifted threshold value, and then adjustment by TFT drift current is performed in order to uniformize the threshold voltage of the TFT.
However, this document relates to a method for adjusting the drift of the threshold voltage of the TFT by the space charge, and the method by this document is different from a method for adjusting the drain current leak of the TFT by the above-mentioned abnormal particle.
In view of the above described drawbacks, an object of the present invention is to provide a method for manufacturing a semiconductor circuit for improving a manufacture yield ratio by suppressing the operation of TFTs including the particles having different threshold values when these TFTs are locally formed.
To achieve this aim is a method for manufacturing a semiconductor circuit comprising:
a semiconductor layer including a channel region, and source and drain regions arranged via the channel region on one main surface;
a gate electrode arranged on the channel region via an insulating film;
a source electrode electrically connected to the source
a drain electrode electrically connected to the drain region,
the method comprising a step for changing crystallinity by selectively irradiating a partial region in the channel region of the semiconductor layer with an energy beam.
Further, there is provided a method for manufacturing a semiconductor circuit comprising:
a semiconductor layer including a channel region and source and drain regions arranged via the channel region on one main surface;
a gate electrode arranged on the channel region via an insulating film;
a source electrode electrically connected to the source region; and
a drain electrode electrically connected to the drain region,
the method comprising a step for selectively heightening a resistance of a partial region in the channel region of the semiconductor layer.
Furthermore, there is provided a method for manufacturing a semiconductor circuit comprising;
a semiconductor layer including a channel region, and source and drain regions arranged via the channel region on one main surface;
a gate electrode arranged on the channel region via an insulating film;
a source electrode electrically connected to the source region; and
a drain electrode electrically connected to the drain region,
the method comprising a step for selectively removing a partial region in the channel region of the semiconductor layer.
According to the present invention, since crystallinity of an active layer of a transistor is changed by irradiating the active layer with a laser beam, particles having an abnormal particle size are produced in the active layer under the influence of foreign particles in the insulating substrate Even if a region having a different threshold value is then generated around such a particle, the operation of the region having a different threshold value among the transistor can be restrained. That is, the abnormal region having a difference threshold value can not adversely affect the operation of an original transistor
In particular, the transistor constituting an analog switch for driving a signal line had a large channel width to allow a flow of a large current and is hence apt to be affected by foreign particles in the insulating substrate. Therefore, particles having an abnormal particle size can be readily generated in the channel region However, even if they are produced, irradiating with a laser beam a region in which foreign particles are mixed can locally restrain the operation of this region, and the leak current does not flow when the transistor for peel display is turned off, thereby improving the display characteristic.